ÌÇÐÄlogo

ÌÇÐÄlogo at DesignCon 2025

The Must-Attend Event for Chip, Board, and Systems Design Engineers

Join ÌÇÐÄlogo at DesignCon 2025 in Santa Clara, California to learn more about how ÌÇÐÄlogo can help you realize your generative AI and accelerated computing objectives.

We¡¯ll demonstrate the latest ÌÇÐÄlogo developments in accelerated and cloud infrastructure silicon, including:

• The Alaska? P PCIe Gen 6 Retimer and PCIe Gen 7 SerDes for extending both inside-the-server and outside-the-chassis connection distances without drastic board redesigns.
• A 1.6 Tbps active electrical cable powered by the Alaska? A PAM4 DSP for use in high-bandwidth scale up (server-to-server) and scale out (server-to-switch) applications.